CIRCUIT ARRANGEMENT FOR THE DIGITAL MULTIPLYING OF

专利名称：CIRCUIT ARRANGEMENT FOR THE DIGITAL

MULTIPLYING OF INTEGER NUMBERS

发明人：HÖFFLINGER, Bernd申请号：EP93903837.0申请日：19930301公开号：EP0628183A1公开日：19941214

摘要： There is disclosed a circuit arrangement for digital multiplication of integers,comprising an encoding unit, an adder unit adding the output values of the encoding unitand a decoding unit decoding the unit output value adder. The invention is characterizedin that the encoding unit code numbers according to the following formula: X = 2 k * (1 +xB) = 2k + XB, Y = 21 * (1 + y B) = 21 + YB , such that the adder unit adds the variables k, 1,and x and y, and that the mixed terms * XB YB are, according to the desired precision, oruntrained, or calculated recursively, according to the mode supra.

申请人：HÖFFLINGER, Bernd

地址：Institut für Mikroelektronik Stuttgart, Allmandring 30a D-70569 Stuttgart DE

国籍：DE

代理机构：Münich, Wilhelm, Dr., et al

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