Comparator of a digital value having CMOS voltage

专利名称：Comparator of a digital value having CMOS

voltage levels with a digital value having ECLvoltage levels

发明人：Philippe Sirito-Olivier申请号：US09550920申请日：20000417公开号：US06335677B1公开日：20020101

专利附图：

摘要：A comparator of a first digital value of n bits having CMOS voltage levels with asecond digital value of n bits having ECL, or CML voltage levels, including a decoder in

CMOS technology provided to provide 2CMOS signals, each of which corresponds to adifferent product of n bits, each of the n bits being a respective bit of the first digitalvalue or its complement; 2AND gates in ECL or CML technology respectively associatedwith the 2CMOS signals, connected to implement an OR function of 2ECL or CML signals,each of which corresponds to a different product of n bits taken from among the bits ofthe second value or their complements, according to the same choice as for the productof n bits of the respective CMOS signal; and means for deactivating the AND gatesassociated with the CMOS signals to 0.

申请人：STMICROELECTRONICS S.A.

代理机构：Seed Ip Law Group, PLLC

代理人：Lisa Jorgenson,Robert Iannucci

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